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| author |  Mora Unie Youer <[email protected]> | 2025-05-02 15:17:36 +0300 |
|---|---|---|
| committer | Mora Unie Youer <[email protected]> | 2025-05-02 15:17:42 +0300 |
| commit | 82ed1c2041150ffca5512acad1080737892c9470 (patch) | |
| tree | 67236c2299250b595d36f44d7163f6ca01206300 | |
| parent | feat: calculation of input signal current (diff) | |
| download | logic-rust-82ed1c2041150ffca5512acad1080737892c9470.tar.gz logic-rust-82ed1c2041150ffca5512acad1080737892c9470.tar.bz2 logic-rust-82ed1c2041150ffca5512acad1080737892c9470.tar.lz logic-rust-82ed1c2041150ffca5512acad1080737892c9470.tar.xz logic-rust-82ed1c2041150ffca5512acad1080737892c9470.tar.zst logic-rust-82ed1c2041150ffca5512acad1080737892c9470.zip | |
fix: improve full NAND/NOR solutions
| -rw-r--r-- | src/main.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main.rs b/src/main.rs index c99d2c1..0577814 100644 --- a/src/main.rs +++ b/src/main.rs @@ -225,7 +225,7 @@ impl Logic { fn to_full_nand(&self) -> Self { match self { - Logic::Not(logic) => Logic::Nand(vec![*logic.clone(), *logic.clone()]), + Logic::Not(logic) => Logic::Nand(vec![*logic.clone(), Logic::Constant(true)]), Logic::And(logics) => Logic::And(logics.iter().map(|l| l.to_full_nand()).collect()), Logic::Or(logics) => Logic::Or(logics.iter().map(|l| l.to_full_nand()).collect()), @@ -238,7 +238,7 @@ impl Logic { fn to_full_nor(&self) -> Self { match self { - Logic::Not(logic) => Logic::Nor(vec![*logic.clone(), *logic.clone()]), + Logic::Not(logic) => Logic::Nor(vec![*logic.clone(), Logic::Constant(false)]), Logic::And(logics) => Logic::And(logics.iter().map(|l| l.to_full_nor()).collect()), Logic::Or(logics) => Logic::Or(logics.iter().map(|l| l.to_full_nor()).collect()), |